Interrupt Service Routine (ISR)
1. Interrupt signal sent to CPU
2. Current process state is saved (registers, PC)
3. CPU executes the ISR
4. Interrupt is serviced
5. Previous state is restored
6. Original process resumes
• Interrupts are checked after each FDE cycle
• If interrupt has higher priority, CPU saves state and services it
• Enables responsive systems (keyboard input, disk completion)
• Prevents CPU from waiting for slow I/O operations
Interrupt Priorities and the Stack
An interrupt can be raised by a hardware device, by software or by a timer.
| Source | Examples |
|---|---|
| Hardware | A key is pressed, a printer runs out of paper, the power supply is about to fail |
| Software | A program requests input or output, or causes an error such as division by zero |
| Timer | The time slice of the running process ends, so the operating system can schedule another process |
Every interrupt has a priority. At the end of each Fetch-Decode-Execute cycle the processor checks whether an interrupt is waiting.
1. If the interrupt has a lower or equal priority than the current task, the current task continues
2. If it has a higher priority, the contents of the registers, including the program counter, are pushed onto a stack
3. The program counter is set to the address of the Interrupt Service Routine, which then runs
4. When the ISR finishes, the register values are popped from the stack and the interrupted task resumes
If an interrupt of higher priority arrives while an ISR is running, the registers are pushed onto the stack again and the new interrupt is serviced first. A stack is last in, first out, so the tasks are resumed in the reverse order.