Logic gates are the fundamental building blocks of digital circuits. All computer processors are built from combinations of these simple gates.
NOT Gate
| A | NOT A |
|---|---|
| 0 | 1 |
| 1 | 0 |
Expression: Q = ¬A
AND Gate
| A | B | A AND B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR Gate
| A | B | A OR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
XOR Gate (Exclusive OR)
| A | B | A XOR B |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NAND Gate
| A | B | A NAND B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR Gate
| A | B | A NOR B |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
| Gate | Output rule | Expression |
|---|---|---|
| NOT | Inverts single input | Q = ¬A |
| AND | 1 only if all inputs are 1 | Q = A ∧ B |
| OR | 1 if at least one input is 1 | Q = A ∨ B |
| XOR | 1 if inputs are different | Q = A ⊕ B |
| NAND | NOT(AND), 0 only if all inputs are 1 | Q = ¬(A ∧ B) |
| NOR | NOT(OR), 1 only if all inputs are 0 | Q = ¬(A ∨ B) |
Truth Tables and Logic Circuits for an Expression
Exam questions ask for a truth table or a logic gate diagram for a given expression, or for the expression that a circuit represents.
• An expression with n inputs needs 2^n rows: 4 rows for two inputs, 8 for three, 16 for four
• List the inputs by counting up in binary, so that no combination is missed
• Add a column for each bracket or NOT, then combine those columns to get the output
Logic circuit:
• Draw one gate for each operator in the expression, starting with the brackets and the NOTs
• The output of one gate becomes an input to the next
• Label every input and the final output
Circuit to expression:
• Work from the inputs towards the output, writing the expression at the output of each gate
• Put brackets round the expression from a gate when it feeds into another gate
| A | B | C | A ∧ B | ¬C | Q |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 0 | 0 |
| 1 | 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 1 | 1 | 0 | 1 |
• A and B are the inputs to an AND gate
• C is the input to a NOT gate
• The outputs of the AND gate and the NOT gate are the two inputs to an OR gate, whose output is Q