Von Neumann Architecture
Definition
A computer architecture where both data and instructions are stored in the same memory and travel along the same bus.
Key Point
Von Neumann Bottleneck: Since data and instructions share the same bus, they cannot be fetched simultaneously. This creates a bottleneck that limits performance.
Harvard Architecture
Definition
A computer architecture with separate memory and buses for data and instructions, allowing both to be fetched simultaneously.
Von Neumann vs Harvard Comparison
| Feature | Von Neumann | Harvard |
|---|---|---|
| Memory | Single memory for data & instructions | Separate memory for data & instructions |
| Buses | Shared data/instruction bus | Separate data and instruction buses |
| Fetch | Cannot fetch data & instruction simultaneously | Can fetch data & instruction simultaneously |
| Speed | Slower (bottleneck) | Faster (parallel fetching) |
| Complexity | Simpler, cheaper | More complex, expensive |
| Use | General-purpose computers | DSPs, microcontrollers, embedded systems |
Key Point
Modern CPUs use a hybrid approach: Harvard architecture for cache (separate L1 instruction and data caches) but Von Neumann for main memory.
Exam Tip
A common exam question asks you to compare Von Neumann and Harvard architectures. Always mention: separate/shared memory, the bottleneck, and simultaneous fetching.
Contemporary Processor Architecture
Definition
A contemporary processor keeps the Von Neumann stored-program model but adds features that are not part of the standard design, so that more instructions are completed in a given time.
| Feature | How it improves on the standard Von Neumann design |
|---|---|
| Harvard-style memory | Separate areas of memory for instructions and data, such as separate instruction and data caches, let an instruction and its data be fetched at the same time |
| Pipelining | One instruction is fetched while the previous one is decoded and the one before that is executed |
| Cache | A small amount of very fast memory holds frequently used instructions and data, so the processor spends less time waiting for RAM |
| Multiple cores | Each core is a separate processing unit that can fetch, decode and execute its own instructions |
Exam Tip
A question on contemporary processors usually wants a feature and a description of it. Name the feature (pipelining), then say what it does (the next instruction is fetched while the current one is being decoded).